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FIN1216MTD Datasheet(PDF) 5 Page - Fairchild Semiconductor |
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FIN1216MTD Datasheet(HTML) 5 Page - Fairchild Semiconductor |
5 / 17 page 5 www.fairchildsemi.com Truth Tables Transmitter Truth Table H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High Impedance F = Floating Note 1: The outputs of the transmitter or receiver will remain in a High Impedance state until VCC reaches 2V. Note 2: TxCLKOut ± will settle at a free running frequency when the part is powered up, PwrDn is HIGH and the TxCLKIn is a steady logic level (L/H/Z). Receiver Truth Table H = HIGH Logic Level L = LOW Logic Level P = Last Valid State X = Don’t Care Z = High Impedance F = Failsafe Condition Note 3: The outputs of the transmitter or receiver will remain in a High Impedance state until VCC reaches 2V. Note 4: Failsafe condition is defined as the input being terminated and un-driven (Z) or shorted or open. Note 5: If RxCLKIn ± is removed prior to the RxIn± data being removed, RxOut will be the last valid state. If RxIn± data is removed prior to RxCLKIn± being removed, RxOut will be HIGH. Inputs Outputs TxIn TxCLKIn PwrDn (Note 1) TxOut ± TxCLKOut ± Active Active H L/H L/H Active L/H/Z H L/H X (Note 2) FActive H L L/H F F H L X (Note 2) XX L Z Z Inputs Outputs RxIn ± RxCLKIn ± PwrDn (Note 3) RxOut RxCLKOut Active Active H L/H L/H Active F (Note 4) H P H F (Note 4) Active H H L/H F (Note 4) F (Note 4) H P (Note 5) H XX L L H |
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