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AM3352BZCZA60 Datasheet(PDF) 84 Page - Texas Instruments |
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AM3352BZCZA60 Datasheet(HTML) 84 Page - Texas Instruments |
84 / 253 page 84 AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351 SPRS717J – OCTOBER 2011 – REVISED APRIL 2016 www.ti.com Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351 Specifications Copyright © 2011–2016, Texas Instruments Incorporated Table 5-8. Valid Combinations of VDD_CORE and VDD_MPU OPPs for ZCZ Package With Device Revision Code "A" or Newer VDD_CORE VDD_MPU OPP50 OPP50 OPP50 OPP100 OPP100 OPP50 OPP100 OPP100 OPP100 OPP120 OPP100 Turbo OPP100 Nitro Table 5-9. VDD_CORE OPPs for ZCE Package with Device Revision Code "A" or Newer(1) VDD_CORE OPP Rev "A" or newer VDD_MPU(2) ARM (A8) DDR3, DDR3L(3) DDR2(3) mDDR(3) L3 and L4 MIN NOM MAX OPP100 1.056 V 1.100 V 1.144 V 600 MHz 400 MHz 266 MHz 200 MHz 200 and 100 MHz OPP100 1.056 V 1.100 V 1.144 V 300 MHz 400 MHz 266 MHz 200 MHz 200 and 100 MHz OPP50 0.912 V 0.950 V 0.988 V 300 MHz — 125 MHz 90 MHz 100 and 50 MHz (1) Frequencies in this table indicate maximum performance for a given OPP condition. (2) VDD_MPU is merged with VDD_CORE on the ZCE package. (3) This parameter represents the maximum memory clock frequency. Because data is transferred on both edges of the clock, double-data rate (DDR), the maximum data rate is two times the maximum memory clock frequency defined in this table. |
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