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SMT4004 Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers |
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SMT4004 Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers |
8 / 23 page 8 SMT4004 2049 2.2 9/13/00 SUMMIT MICROELECTRONICS, Inc. REGISTER FORMATS AND FUNCTIONS There are four basic register types. The first are those that set a monitoring threshold where the binary value written to the register is multiplied times the base incremental voltage. The second type enables or disables a specific function: unless otherwise indicated a “1” will always enable the function and a “0” will disable or deselect that function. Note: only the enabled condition will be depicted in the following tables. The third Register type allows selection of various timer values. These are not incremen- tal, like the thresholds, but specific bit patterns select specific timer values. The fourth register type is the nonvolatile fault register that records fault conditions. A “0” in any bit location indicates its corresponding monitor function was within specified limits when the fault oc- curred. A “1” in any bit location indicates its corresponding monitor function was outside its specified limits when the fault occurred. Bus-side Under-voltage Threshold Registers 00, 01, 02 and 03 are identical. Their contents select the under-voltage threshold for the VI1, VI2, VI3 and VI4 inputs, respectively. 3 0 R , 2 0 R , 1 0 R , 0 0 R r e t s i g e R 7 D6 D5 D4 D3 D2 D1 D0 Dn o i t c A 1 1 1 1 1111 V 0 . 6 = t n e m t s u j d a d l o h s e r h t t s e h g i H 0 0 0 0 0000 V 9 . 0 = t n e m t s u j d a d l o h s e r h t t s e w o L 00 000 0 1 0 2 ( + V 9 . 0 = d l o h s e r h T × , V 4 9 . 0 = ) V 2 0 . . g . e 2049 Table01 1.0 Bus-side Under-voltage Threshold Enable and Over-voltage Offset Registers 04, 05, 06 and 07 are identical. Their contents determine whetheror not the under- or over-voltage capa- bilities are enabled, and establish the over-voltage offset value for the VI1, VI2, VI3 and VI4 inputs, respectively. 7 0 R , 6 0 R , 5 0 R , 4 0 R r e t s i g e R 7 D6 D5 D4 D3 D2 D1 D0 Dn o i t c A x 1 x x xxxx n o i t c e t e d e g a t l o v r e d n u s e l b a n E xx 1 x xxxx n o i t c e t e d e g a t l o v r e v o s e l b a n E xx x 00 0 1 0 I V ( = d l o h s e r h T D L O H S E R H T ( + ) % 0 2 + n × I V 4 0 . D L O H S E R H T e r e h w ) n e u l a v y r a n i b r e t s i g e r = 2049 Table02 1.0 Card-side Under-voltage Threshold Registers 08, 09, 0A and 0B are identical. Their contents select the under-voltage threshold for the VO1, VO2, VO3 and VO4 inputs, respectively. B 0 R , A 0 R , 9 0 R , 8 0 R r e t s i g e R 7 D6 D5 D4 D3 D2 D1 D0 Dn o i t c A 1 1 1 1 1111 V 0 . 6 = t n e m t s u j d a d l o h s e r h t t s e h g i H 0 0 0 0 0000 V 9 . 0 = t n e m t s u j d a d l o h s e r h t t s e w o L 00 000 0 1 0 2 ( + V 9 . 0 = d l o h s e r h T × , V 4 9 . 0 = ) V 2 0 . . g . e 2049 Table03 1.0 |
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