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TL081CP Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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TL081CP Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 8 page Application Hints (Continued) common-mode range again puts the input stage and thus the amplifier in a normal operating mode Exceeding the positive common-mode limit on a single input will not change the phase of the output however if both inputs exceed the limit the output of the amplifier will be forced to a high state The amplifier will operate with a common-mode input volt- age equal to the positive supply however the gain band- width and slew rate may be decreased in this condition When the negative common-mode voltage swings to within 3V of the negative supply an increase in input offset voltage may occur The TL081 is biased by a zener reference which allows nor- mal circuit operation on g4V power supplies Supply volt- ages less than these may result in lower gain bandwidth and slew rate The TL081 will drivea2kX load resistance to g10V over the full temperature range of 0 Cto a70 C If the amplifier is forced to drive heavier load currents however an in- crease in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings Precautions should be taken to ensure that the power sup- ply for the integrated circuit never becomes reversed in po- larity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit Because these amplifiers are JFET rather than MOSFET input op amps they do not require special handling As with most amplifiers care should be taken with lead dress component placement and supply decoupling in or- der to ensure stability For example resistors from the out- put to an input should be placed with the body close to the input to minimize ‘‘pick-up’’ and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground A feedback pole is created when the feedback around any amplifier is resistive The parallel resistance and capaci- tance from the input of the device (usually the inverting in- put) to AC ground set the frequency of the pole In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin However if the feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant Detailed Schematic TLH8358 – 8 6 |
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