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S-8333CBHA-T8T1y Datasheet(PDF) 16 Page - Seiko Instruments Inc |
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S-8333CBHA-T8T1y Datasheet(HTML) 16 Page - Seiko Instruments Inc |
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16 / 44 page  STEP-UP, FOR LCD BIAS SUPPLY, 1-CHANNEL, PWM CONTROL SWITCHING REGULATOR CONTROLLER S-8333 Series Rev.4.2_01 16 4. External transistor A bipolar (NPN) or enhancement (N-channel) MOS FET transistor can be used as the external capacitor. 4. 1 Bipolar (NPN) type The driving capability when the output current is increased by using a bipolar transistor is determined by hFE and Rb of the bipolar transistor. Figure 11 shows a peripheral circuit. Nch Pch Rb VIN IPK EXT Cb 2200 pF 1 k Ω Figure 11 External Transistor Periphery 1 k Ω is recommended for Rb. Actually, calculate the necessary base current (Ib) from hFE of the bipolar transistor as follows and select an Rb value lower than this. Ib = hFE IPK Rb = Ib VIN − 0.7 − IEXTH 0.4 A small Rb increases the output current, but the efficiency decreases. Actually, a pulsating current flows and a voltage drop occurs due to the wiring capacitance. Determine the optimum value by experiment. A speed-up capacitor (Cb) connected in parallel with Rb resistance as shown in Figure 11 decreases the switching loss and improves the efficiency. Select Cb by observing the following equation. Cb ≤ 1 2 π × Rb × fosc × 0.7 However, in practice, the optimum Cb value also varies depending on the characteristics of the bipolar transistor employed. Therefore, determine the optimum value of Cb by experiment. 4. 2 Enhancement MOS FET type Use an Nch power MOS FET. For high efficiency, using a MOS FET with a low ON resistance (RON) and small input capacitance (CISS) is ideal, however, ON resistance and input capacitance generally share a trade-off relationship. The ON resistance is efficient in a range in which the output current is relatively great during low-frequency switching, and the input capacitance is efficient in a range in which the output current is middling during high-frequency switching. Select a MOS FET whose ON resistance and input capacitance are optimal depending on the usage conditions. The input voltage (VIN) is supplied for the gate voltage of the MOS FET, so select a MOS FET with a gate withstanding voltage that is equal to the maximum usage value of the input voltage or higher and a drain withstanding voltage that is equal to the amount of the output voltage (VOUT) and diode voltage (VD) or higher. If a MOS FET with a threshold that is near the UVLO detection voltage is used, a large current may flow, stopping the output voltage from rising and possibly generating heat in the worst case. Select a MOS FET with a threshold that is sufficiently lower than the UVLO detection voltage value. |
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