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GS8182Q36BGD-167 Datasheet(PDF) 6 Page - GSI Technology |
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GS8182Q36BGD-167 Datasheet(HTML) 6 Page - GSI Technology |
6 / 36 page Pin Description Table Symbol Description Type Comments SA Synchronous Address Inputs Input — NC No Connect — — R Synchronous Read Input Active Low W Synchronous Write Input Active Low BW Synchronous Byte Write Input Active Low x9 only BW0–BW3 Synchronous Byte Writes Input Active Low x36 only BW0–BW1 Synchronous Byte Writes Input Active Low x18 only K Input Clock Input Active High K Input Clock Input Active Low C Output Clock Input Active High C Output Clock Input Active Low TMS Test Mode Select Input — TDI Test Data Input Input — TCK Test Clock Input Input — TDO Test Data Output Output — VREF HSTL Input Reference Voltage Input — ZQ Output Impedance Matching Input Input — Qn Synchronous Data Outputs Output — Dn Synchronous Data Inputs Input — Doff Disable DLL when low Input Active Low CQ Output Echo Clock Output — CQ Output Echo Clock Output — VDD Power Supply Supply 1.8 V Nominal VDDQ Isolated Output Buffer Supply Supply 1.5 or 1.8 V Nominal VSS Power Supply: Ground Supply — GS8182Q08/09/18/36BD-333/300/250/200/167/133 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.03d 11/2011 6/36 © 2007, GSI Technology Notes: 1. NC = Not Connected to die or any other pin 2. When ZQ pin is directly connected to VDDQ, output impedance is set to minimum value and it cannot be connected to ground or left unconnected. 3. K, K cannot be set to VREF voltage. |
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