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AD7989-1 Datasheet(PDF) 5 Page - Analog Devices

No. de Pieza. AD7989-1
Descripción  PulSAR ADCs in MSOP/LFCSP
Descarga  24 Pages
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Fabricante  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD7989-1 Datasheet(HTML) 5 Page - Analog Devices

 
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Data Sheet
AD7989-1/AD7989-5
Rev. B | Page 5 of 24
TIMING SPECIFICATIONS
VDD = 2.37 V to 2.63 V, VIO = 2.3 V to 5.5 V, TA = −40°C to +85°C, unless otherwise noted.1
Table 4.
Parameter
Symbol
Min
Typ
Max
Unit
THROUGHPUT RATE
AD7989-1
100
kSPS
AD7989-5
500
kSPS
CONVERSION AND ACQUISITION TIMES
Conversion Time: CNV Rising Edge to Data Available
tCONV
AD7989-1
9500
ns
AD7989-5
1600
ns
Acquisition Time
tACQ
AD7989-1
500
ns
AD7989-5
400
ns
Time Between Conversions
tCYC
AD7989-1
10
μs
AD7989-5
2
μs
CNV PULSE WIDTH (CS MODE)
tCNVH
500
ns
SCK
SCK Period (CS Mode)
tSCK
VIO Above 4.5 V
10.5
ns
VIO Above 3 V
12
ns
VIO Above 2.7 V
13
ns
VIO Above 2.3 V
15
ns
SCK Period (Chain Mode)
tSCK
VIO Above 4.5 V
11.5
ns
VIO Above 3 V
13
ns
VIO Above 2.7 V
14
ns
VIO Above 2.3 V
16
ns
SCK Low Time
tSCKL
4.5
ns
SCK High Time
tSCKH
4.5
ns
SCK Falling Edge to Data Remains Valid
tHSDO
3
ns
SCK Falling Edge to Data Valid Delay
tDSDO
VIO Above 4.5 V
9.5
ns
VIO Above 3 V
11
ns
VIO Above 2.7 V
12
ns
VIO Above 2.3 V
14
ns
CS MODE
CNV or SDI Low to SDO D17 MSB Valid
tEN
VIO Above 3 V
10
ns
VIO Above 2.3V
15
ns
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
tDIS
20
ns
SDI Valid Setup Time from CNV Rising Edge (CS Mode)
tSSDICNV
5
ns
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
tHSDICNV
2
ns
CHAIN MODE
SCK Valid Setup Time from CNV Rising Edge
tSSCKCNV
5
ns
SCK Valid Hold Time from CNV Rising Edge
tHSCKCNV
5
ns
SDI Valid Setup Time from SCK Falling Edge
tSSDISCK
2
ns
SDI Valid Hold Time from SCK Falling Edge
tHSDISCK
3
ns
1 See Figure 2 and Figure 3 for load conditions.


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