L

V

V

V

V

t

I

2

f

OUT

IN

OUT

IN

2

ON

OUT

PSM

-

´

´

´

=

EN

V

OUT

PG

Disable

Enable

MODE

Detection

Soft Startup

9

TPS62097-Q1

www.ti.com

SLVSDZ7 – AUGUST 2017

Product Folder Links: TPS62097-Q1

Submit Documentation Feedback

Copyright © 2017, Texas Instruments Incorporated

Device Function Modes (continued)

Once the EN pin is pulled high, the IC enables internal circuit blocks and prepares to ramp the output up. The

period between the rising edge of the EN pin and the beginning of the power stage switching is called the MODE

detection time, typically 50µs. During the MODE detection time period, shown in Figure 2, the PWM switching

frequency and operating mode are set by the MODE pin status, as shown in Table 1.

The PWM switching frequency can't be changed after the detection time period. Only when the device is set in

PWM/PSM mode during the MODE detection time period (MODE = AGND), it is possible to switch between

PWM/PSM and forced PWM operation modes by toggling the MODE pin with a GPIO pin of a micro-controller,

for example. The other four MODE pin selections force the device in PWM mode only.

Figure 2. Power Up Sequence

Table 1. Switching Frequency and Mode Selection

Typical PWM

Switching

Frequency (MHz)

Resistance at MODE pin

(E24 EIA Value)

Toggle MODE pin after

MODE detection

ON-Time Equation

Operating Mode

1.50

8.2kΩ ±5%

No

Forced PWM

1.75

18kΩ ±5%

No

Forced PWM

2.00

AGND

Yes

PWM/PSM and

Forced PWM

2.25

39kΩ ±5%

No

Forced PWM

2.50

75kΩ ±5% or Open

No

Forced PWM

Connecting the MODE pin to AGND with a resistor or leaving the MODE pin open forces the device into PWM

mode for the whole load range. The device operates with a constant switching frequency that allows simple

filtering of the switching frequency for noise sensitive applications. In forced PWM mode, the efficiency is lower

than that of PSM at light load.

Connecting the MODE pin to the AGND pin enables Power Save Mode with an automatic transition between

PWM and Power Save Mode. As the load current decreases and the inductor current becomes discontinuous,

the device enters Power Save Mode operation automatically. In Power Save Mode, the switching frequency is

reduced and estimated by Equation 2. In Power Save Mode, the output voltage rises slightly above the nominal

output voltage, as shown in . This effect is minimized by increasing the output capacitor.

(2)

When the device operates close to 100% duty cycle mode, the TPS62097-Q1 can't enter Power Save Mode

regardless of the load current if the input voltage decreases to typically 15% above the output voltage. The

device maintains output regulation in PWM mode.