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TPS6508700 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS6508700 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 100 page  11 TPS6508700 www.ti.com SWCS134 – OCTOBER 2017 Submit Documentation Feedback Product Folder Links: TPS6508700 Specifications Copyright © 2017, Texas Instruments Incorporated Electrical Characteristics: Buck Controllers (continued) over recommended input voltage range, TA = –40°C to +85°C and TA = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ΔVOUT/ ΔIOUT Load regulation VIN = 13 V, VOUT = 1, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3 V, IOUT = 0 A to 7 A, referenced to VOUT at IOUT = IOUT_MAX 0% 1% VTH_PG Power good deassertion threshold in percentage of target VOUT VOUT rising 105.5% 108% 110.5% VOUT falling 89.5% 92% 94.5% RDSON_ DRVH Driver DRVH resistance Source, IDRVH = –50 mA 3 Ω Sink, IDRVH = 50 mA 2 Ω RDSON_ DRVL Driver DRVL resistance Source, IDRVL = –50 mA 3 Ω Sink, IDRVL = 50 mA 0.4 Ω RDIS Output auto-discharge resistance BUCKx_DIS[1:0] = 01b 100 Ω BUCKx_DIS[1:0] = 10b 200 Ω BUCKx_DIS[1:0] = 11b 500 Ω CBOOT Bootstrap capacitance 100 nF RON_BO OT Bootstrap switch ON resistance 20 Ω 4.8 Electrical Characteristics: Synchronous Buck Converters over recommended input voltage range, TA = –40°C to +85°C and TA = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT BUCK3, BUCK4, BUCK5 VIN Power input voltage 4.5 5 5.5 V VOUT DC output voltage VID range and options VID step size = 25 mV, BUCKx_VID[6:0] progresses from 0000001b to 1111111b 0.425 3.575 V BUCK3 output voltage default Set by BUCK3_VID[6:0], 25-mV step size 1.8 V BUCK4 output voltage default Set by BUCK4_VID[6:0], 25-mV step size 0.8 V BUCK5 output voltage default Set by BUCK5_VID[6:0], 25-mV step size 1.8 V DC output voltage accuracy VOUT = 1, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3 V, IOUT = 1.5 A –2% 2% VOUT = 1, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3 V, IOUT = 100 mA –2.5% 2.5% Total output voltage accuracy (DC plus ripple) in DCM IOUT = 10 mA, VOUT ≤ 1 V –30 40 mV SR(VOU T) Output DVS slew rate 5 6.25 mV/µs IOUT Continuous DC output current 3 A IIND_LIM HSD FET current limit 4.3 7 A IQ Quiescent current VIN = 5 V, VOUT = 1 V 35 µA ΔVOUT/ ΔVIN Line regulation VOUT = 1, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3 V, IOUT = 1.5 A –0.5% 0.5% ΔVOUT/ ΔIOUT Load regulation VIN = 5 V, VOUT = 1, 1.2, 1.35, 1.5, 1.8, 2.5, 3.3 V, IOUT = 0 A to 3 A, referenced to VOUT at IOUT = 1.5 A –0.2% 2% VTH_PG Power good deassertion threshold in percentage of target VOUT VOUT rising 108% VOUT falling 92% VTH_HYS _PG Power good reassertion hysteresis entering back into VTH_PG VOUT rising or falling 3% RDIS Output auto-discharge resistance BUCKx_DIS[1:0] = 01b 100 Ω BUCKx_DIS[1:0] = 10b 200 BUCKx_DIS[1:0] = 11b 500 |
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