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TA1360ANG Datasheet(PDF) 6 Page - Toshiba Semiconductor |
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TA1360ANG Datasheet(HTML) 6 Page - Toshiba Semiconductor |
6 / 108 page TA1360ANG 2003-01-21 6 Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal 15 VD IN Inputs vertical sync VD signal. Inputs positive- or negative-polarity signals. or 16 HD IN Inputs horizontal sync HD signal. Inputs positive- or negative-polarity signals. or 17 SCP IN Inputs SCP from up converter. Input signals are clamp pulse (CP) and black peak detection stop pulse (BPP). 2.2 V to 2.8 V : BPP 4.2 V to 9 V : CP 18 CP OUT Outputs internal clamp pulse (CP). 19 DEF/DAC VCC VCC pin for DEF/DAC block. See “Maximum Ratings” about the voltage. 20 AFC FILTER Connects filter for detecting AFC. DC 21 HVCO Connects ceramic oscillator for horizontal oscillation. Use Murata “CSBLA503KECZF30”. 19 15 25 1 k Ω Threshold : 0.75 V 0 V Threshold : 0.75 V 0 V 19 16 25 1 k Ω Threshold : 0.75 V 0 V Threshold : 0.75 V 0 V 5 V 0 V 19 21 25 10 k Ω 1 k Ω 19 18 25 200 Ω 19 20 25 300 Ω 30 k Ω VCO 19 17 25 5 k Ω |
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