Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

AD73322L Datasheet(PDF) 17 Page - Analog Devices

No. de pieza AD73322L
Descripción Electrónicos  Low Cost, Low Power CMOS General-Purpose Dual Analog Front
Download  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD73322L Datasheet(HTML) 17 Page - Analog Devices

Back Button AD73322L_17 Datasheet HTML 13Page - Analog Devices AD73322L_17 Datasheet HTML 14Page - Analog Devices AD73322L_17 Datasheet HTML 15Page - Analog Devices AD73322L_17 Datasheet HTML 16Page - Analog Devices AD73322L_17 Datasheet HTML 17Page - Analog Devices AD73322L_17 Datasheet HTML 18Page - Analog Devices AD73322L_17 Datasheet HTML 19Page - Analog Devices AD73322L_17 Datasheet HTML 20Page - Analog Devices AD73322L_17 Datasheet HTML 21Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 49 page
background image
AD73322L
Rev. A | Page 16 of 48
In mixed control/data mode, the resolution is fixed at 15 bits,
with the MSB of the 16-bit transfer being used as a flag bit to
indicate either control or data in the frame.
DECODER CHANNEL
The decoder channels consist of digital interpolators, digital
sigma-delta modulators, single bit digital-to-analog converters
(DAC), analog smoothing filters and programmable gain
amplifiers with differential outputs.
DAC CODING
The DAC coding scheme is in twos complement format with
0x7FFF being full-scale positive and 0x8000 being full-scale
negative.
INTERPOLATION FILTER
The anti-imaging interpolation filter is a sinc-cubed digital
filter that up-samples the 16-bit input words from the input
sample rate to a rate of DMCLK/8, while filtering to attenuate
images produced by the interpolation process. Its Z transform is
given as
[(1 − Z−N )/(1 − Z−1 )]3
where N is determined by the sampling rate
(N = 32 @ 64 kHz . . . N = 256 @ 8 kHz)
The DAC receives 16-bit samples from the host DSP processor
at the programmed sample rate of DMCLK/N. If the host
processor fails to write a new value to the serial port, the
existing (previous) data is read again. The data stream is filtered
by the anti-imaging interpolation filter, but there is an option to
bypass the interpolator for the minimum group delay
configuration by setting the IBYP bit (CRE:5) of Control
Register E. The interpolation filter has the same characteristics
as the ADC’s antialiasing decimation filter.
The output of the interpolation filter is fed to the DAC’s digital
sigma-delta modulator, which converts the 16-bit data to 1-bit
samples at a rate of DMCLK/8. The modulator noise-shapes the
signal so that errors inherent to the process are minimized in
the pass band of the converter. The bit-stream output of the
sigma-delta modulator is fed to the single bit DAC where it is
converted to an analog voltage.
ANALOG SMOOTHING FILTER AND PGA
The output of the single bit DAC is sampled at DMCLK/8,
therefore it is necessary to filter the output to reconstruct the
low frequency signal. The decoder’s analog smoothing filter
consists of a continuous-time filter preceded by a third-order
switched-capacitor filter. The continuous-time filter forms
part of the output programmable gain amplifier (PGA).
The PGA can be used to adjust the output signal level from
−15 dB to +6 dB in 3 dB steps, as shown in Table 9. The PGA
gain is set by bits OGS0, OGS1, and OGS2 (CRD:4-6) in
Control Register D.
Table 9. PGA Settings for the Decoder Channel
OGS2
OGS1
OGS0
Gain (dB)
0
0
0
+6
0
0
1
+3
0
1
0
0
0
1
1
−3
1
0
0
−6
1
0
1
−9
1
1
0
−12
1
1
1
−15
DIFFERENTIAL OUTPUT AMPLIFIERS
The decoder has a differential analog output pair (VOUTP and
VOUTN). The output channel can be muted by setting the
MUTE bit (CRD:7) in Control Register D. The output signal is
dc-biased to the codec’s on-chip voltage reference.
VOLTAGE REFERENCE
The AD73322L reference, REFCAP, is a band gap reference that
provides a low noise, temperature-compensated reference to the
DAC and ADC. A buffered version of the reference is also made
available on the REFOUT pin, and can be used to bias other
external analog circuitry. The reference has a default nominal
value of 1.2 V.
The reference output (REFOUT) can be enabled for biasing
external circuitry by setting the RU bit (CRC:6) of CRC.
INVERTING
OP AMPS
ANALOG
GAIN TAP
ANALOG
LOOP-BACK
SELECT
INVERT
SINGLE-
ENDED
ENABLE
CONTINUOUS
TIME
LOW-PASS
FILTER
VREF
VFBN1
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
AD73322L
+6/–15dB
PGA
0/38dB
PGA
GAIN
±1
REFCAP
REFOUT
REFERENCE
VREF
Figure 18. Analog Input/Output Section


Número de pieza similar - AD73322L_17

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Analog Devices
AD73322L AD-AD73322L_15 Datasheet
1Mb / 48P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. A
More results

Descripción similar - AD73322L_17

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Analog Devices
AD73322 AD-AD73322_17 Datasheet
421Kb / 44P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front
AD73322ARZ AD-AD73322ARZ Datasheet
389Kb / 43P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. B
AD73322 AD-AD73322_15 Datasheet
389Kb / 43P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. B
AD73322 AD-AD73322 Datasheet
386Kb / 43P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. B
AD73322L AD-AD73322L Datasheet
437Kb / 40P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. 0
AD73322L AD-AD73322L_15 Datasheet
1Mb / 48P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. A
AD73311LARUZ AD-AD73311LARUZ Datasheet
357Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. A
AD73311L AD-AD73311L Datasheet
382Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. A
AD73311ARZ-REEL AD-AD73311ARZ-REEL Datasheet
340Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. B
AD73311LARUZ-RL7 AD-AD73311LARUZ-RL7 Datasheet
340Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


Datasheet Descarga

Go To PDF Page


Enlace URL




Política de Privacidad
ALLDATASHEET.ES
¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com