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TPS71219 Datasheet(PDF) 11 Page - Texas Instruments

No. de pieza TPS71219
Descripción Electrónicos  Dual 250 mA Output, UltraLow Noise, High PSRR, Low-Dropout Linear Regulator
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

TPS71219 Datasheet(HTML) 11 Page - Texas Instruments

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TRANSIENT RESPONSE
SHUTDOWN
POWER DISSIPATION
INTERNAL CURRENT LIMIT
THERMAL PROTECTION
P
D
+ (VIN * VOUT)
I
OUT
(4)
TPS71202, TPS71219
TPS71229, TPS71247
TPS71256, TPS71257
SBVS049B – MAY 2004 – REVISED MARCH 2005
Depending on power dissipation, thermal resistance,
and ambient temperature, the thermal protection
As with any regulator, increasing the size of the
circuit may cycle on and off. This limits the dissipation
output capacitor will reduce over/undershoot magni-
of the regulator, protecting it from damage due to
tude but increase duration of the transient response.
overheating.
In the adjustable version, the addition of a capacitor,
CFB, from the output to the feedback pin will also
Any tendency to activate the thermal protection circuit
improve stability and transient response. The transi-
indicates excessive power dissipation or an inad-
ent response of the TPS712xx is enhanced with an
equate heatsink. For reliable operation, junction tem-
active pull-down that engages when the output is
perature should be limited to +125°C maximum. To
over-voltaged. The active pull-down decreases the
estimate the margin of safety in a complete design
output recovery time when the load is removed.
(including heatsink), increase the ambient tempera-
Figure 13 in the Typical Characteristics section shows
ture until the thermal protection is triggered; use
the output transient response.
worst-case loads and signal conditions. For good
reliability, thermal protection should trigger at least
+35°C above the maximum expected ambient con-
dition of your application. This produces a worst-case
Both enable pins are active high and are compatible
junction temperature of +125°C at the highest ex-
with standard TTL-CMOS levels. The device is only
pected ambient temperature and worst-case load.
completely disabled when both EN1 and EN2 are
The internal protection circuitry of the TPS712xx was
logic low. In this state, the LDO is completely off and
designed to protect against overload conditions. It
the ground pin current drops to approximately 100
was not intended to replace proper heatsinking.
nA. With one output disabled, the ground pin current
Continuously running the TPS712xx into thermal
is slightly greater than half the nominal value. When
shutdown will degrade device reliability.
shutdown capability is not required, the enable pins
should be connected to the input supply.
The ability to remove heat from the die is different for
each package type, presenting different consider-
The TPS712xx internal current limit helps protect the
ations in the PCB layout. The PCB area around the
regulator during fault conditions. During current limit,
device that is free of other components moves the
the output will source a fixed amount of current that is
heat from the device to the ambient air. Performance
largely independent of the output voltage.
data for a JEDEC high-K board is shown in the
The TPS712xx PMOS-pass transistors have a built-in
Dissipation Ratings table. Using heavier copper will
back diode that conducts reverse current when the
increase the effectiveness in removing heat from the
input voltage drops below the output voltage (that is,
device. The addition of plated through-holes to
during power-down). Current is conducted from the
heat-dissipating layers will also improve the heat-sink
output to the input and is not internally limited. If
effectiveness.
extended reverse voltage operation is anticipated,
Power dissipation depends on input voltage and load
external limiting may be appropriate.
conditions. Power dissipation is equal to the product
of the output current times the voltage drop across
the output pass element (VIN to VOUT):
Thermal protection disables both outputs when the
junction temperature of either channel rises to ap-
proximately +160°C, allowing the device to cool.
Power dissipation can be minimized by using the
When the junction temperature cools to approxi-
lowest possible input voltage necessary to assure the
mately +140°C, the output circuitry is again enabled.
required output voltage.
11


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