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MT9M131 Datasheet(PDF) 40 Page - ON Semiconductor

No. de pieza MT9M131
Descripción Electrónicos  1/3?릋nch SOC 1.3Mp CMOS Digital Image Sensor
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Fabricante Electrónico  ONSEMI [ON Semiconductor]
Página de inicio  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MT9M131 Datasheet(HTML) 40 Page - ON Semiconductor

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MT9M131
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Output Timing
Figure 11. Vertical Timing
Line 0
Line 1
LineN−3
LineN−2
LineN−1
Line 0
FRAME_VALID
LINE_VALID
D[7:0]
EF
DB
C
A
NO DATA
Figure 12. Horizontal Timing
10
FF
00
00
80
CB0
Y0
CR1
Y1
CB3
Y3
CRn
−1
Yn
FF
00
00
9D
PIXCLK
LINE_VALID
D[7:0]
10
Notes:
1. Line start: FF00 0080.
2. Line end: FF00 009D.
Typical Resolutions, Modes, and Timing
The parameters in Table 17 are illustrated in waveform
diagram Figure 11. Table 22 provides values for these
parameters in some common resolutions and operating
modes.
Table 17. BLANKING DEFINITIONS
Designation
Definition
A
FV (Rising Edge) to LV (Rising Edge) Delay
B
LV (Falling Edge) to FV (Falling Edge) Delay
C
LV (HIGH/Valid) Time
D
LV (LOW/Horizontal Blanking) Time
E
FV (HIGH/Valid) Time
F
FV (LOW/Vertical Blanking) Time
(G)
Number of PIXCLK Cycles in a Given Burst
(H)
Number of PIXCLK Cycles between Bursts
Reset, Clocks, and Standby
Functional Operation
Power-up reset is asserted/de-asserted on RESET_BAR.
It is active LOW. In this reset state, all control registers have
the default values. All internal clocks are turned off except
for the divided-by-2 clock to the sensor core.
Soft reset is asserted/de-asserted by the two-wire serial
interface program. There are sensor core soft resets and SOC
soft resets. In soft reset mode, the two-wire serial interface
and register ring bus are still running. All control registers
are reset using default values. See R0x00D.
Hard standby is asserted/de-asserted on STANDBY. It is
active HIGH. In this hard standby state, all internal clocks
are turned off and analog block is in standby mode to save
power consumption.
NOTE:
Following the assertion of hard standby, at least
24 master clock cycles must be delivered to
complete the transition to the hard standby state.
Soft standby is asserted/de−asserted differently in the
sensor page or colorpipe page. The sensor soft standby bit is
in R0x00D[2]. Colorpipe soft standby disables some of the


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